(1) Field of the Invention
The present invention relates to the field of semiconductor devices fabrication. More specifically, the present invention relates to fabrication of dynamic threshold voltage devices (DTVD).
(2) Background Information
Dynamic threshold voltage devices (DTVD), include Metal Oxide Semiconductor Field Effect Transistors (MOSFET) configured to obtain higher drain-to-source currents for a same gate voltage. A DTVD is based on a MOSFET that has its body (substrate) debiased (charged). FIG. 1 schematically illustrates a cross-sectional view through a DTVD 100. DTVD 100 includes a gate 102, a source 104, a drain 106, the body 108 and a substrate 112 that may be a silicon substrate for example. The body 108 is separated from substrate 112 by an oxide film 110, as DTVD 100 is built according to Silicon-On-Insulator (SOI) technology. The gate 102 is electrically coupled to body 108 by way of conductor 105. As the potential applied to the gate raises, body 108 gets charged changing its potential and conducting more current. As the gate voltage increases, the body 108 slowly becomes debiased, such that the threshold voltage VT effectively decreases. The increase in the gate voltage and the decrease in the threshold voltage VT cause current IDS between drain and source, to increase, as IDS is proportional to (VGS-VT)2, where VGS is the gate-source voltage.
At high frequency, when a signal is applied to a periphery 131 of gate 102, a certain amount of time xcfx84 is required to charge up the gate from periphery 131 of gate 102 to edge 130 thereof. As body 108 is not heavily doped it has a high resistance R. The high resistance R contributes to a high propagation delay RC through the body, where C represents the capacitance of the body. This delay may be an order of magnitude larger than the delay xcfx84 to the gate. The DTVD may practically be unusable at very high frequencies, because it takes the body a longer time to charge up than it takes the gate.